• Centre of Excellence SRES-COEP and Eklakshya VLSI R & D Centre Pvt. Ltd (EVRDCPL) recommends Senate and Board-of-Governance (BOG) , College of Engineering, Pune, to award the Post Graduate Diploma in Embedded System Design to those students who have successfully completed the stipulated Postgraduate Diploma Program.
    • The Postgraduate Diploma program with the governing rules and regulations are formulated and approved by CESRES-COEP (Center for Excellence Smart Energy renewable systems, College of Engineering Pune) , Industry advisory board, Board-Of-Studies and EVRDCPL. CESRES and EVRDCPL can jointly modify or change the course structure and governing rules and regulations from time to time and shall recommend to Senate and BOG for their approval. These rules and regulations will be applicable to any candidate seeking admission to Postgraduate diploma program in this institute.
    • A candidate becomes eligible for the recommendation for to the senate and BOG for the award of PG Diploma after fulfilling all the academic requirements prescribed by the CESRES-COEP and EVRDCPL.
    • Director – COEP and Chairman Senate would appoint a Professor from CESRES-COEP to work as Chairman of the PG Diploma admission committee which will have participation from EVRDCPL. This committee would be responsible for the entire admission process including scrutiny of applications, conduct of entrance test, interview of candidates etc.
  • ekLakshya VLSI R&D Centre Pvt Ltd,
    C-Lite Building,
  • BVB Campus Vidyanagar, Hubli
    Hubli Karnataka 580031 India
  • Phone: 0836-2272210 / 8050050183 / 8050050185
  • Email:

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